The thermal stability of packaging compositions such as underfill materials or encapsulation molding compounds, is important in reducing the warpage of chip packages. Desirable materials have properties such as high thermal stability, low shrinkage, a favorable coefficient of thermal expansion (CTE), and other qualities such as a low moisture uptake.
In chip packaging technology, the active surface of the die is subject to numerous electrical couplings that are usually brought to the edge of the chip package. Heat generation is significant at the active surface of the die, and consequently at the pin-out locations of the chip package. Electrical connections, referred to variously as bond wires, balls, bumps, and others, are connected to terminals on the active surface of a chip. The connections include solders and/or plastics that make mechanical connections and electrical couplings to a substrate. If the connections are solder bumps, the solder bumps on the flip-chip are soldered to the bonding pads on the substrate. In flip-chip packages, a gap exists between the flip-chip active surface and the mounting substrate. One characteristic of flip-chip technology is shear stress on the solder joints during temperature cycling of the device. This shear stress is partially a result of a difference in the CTE of the flip-chip and the mounting substrate.
Die materials such as silicon, germanium, and gallium arsenide, along with their packaging materials, may have CTEs in a range from about 3 ppm/° C. to about 6 ppm/° C. Mounting substrates are usually composites of organic-impregnated fiberglass dielectrics and metallic circuitry. These substrates may have CTEs in a range from about 15 ppm/° C. to about 25 ppm/° C. Consequently, a mismatch in the CTEs exists between the flip-chip and the mounting substrate. To reduce solder joint failures due to stress during thermal cycling, the solder joints are reinforced by filling the space between the flip-chip and the mounting substrate, and around the solder joints, with an underfill composite.
The packaging composition can include particulate filler inorganics such as silica or the like, and metal flakes or the like. The particulate filler increases the bulk modulus and acts as a CTE intermediary for the mismatched CTEs of the chip and the mounting substrate.